LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_signed.all;
USE ieee.numeric_std.all; 

ENTITY inst_mem IS
	PORT ( Address		: IN STD_LOGIC_VECTOR(7 DOWNTO 0);
		   Instruction	: OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
		   Immediate	: OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END inst_mem;

ARCHITECTURE Behavior OF inst_mem IS
	
	SIGNAL memory		: STD_LOGIC_VECTOR(0 TO 71);
	
BEGIN
				--Memorias de Instrucoes para testes:
				----------------------------------------MOV
				-- teste mov rA, rB
				-- [mov r3,imed | imd(14) | bubble | bubble | mov r1,imed | imd(6) | bubble | bubble | mov r3, r1]
				-- memory(0 TO 71)   <= "1000100000001110000000000000000010000000000001100000000000000000000001000";
				
				----------------------------------------ADD
				-- teste add rA, rB
				-- [mov r3,imed | imd(14) | bubble | bubble | mov r1,imed | imd(6) | bubble | bubble | add r3, r1]
				memory(0 TO 71)   <= "100010000000111000000000000000001000000000000110000000000000000000011000";
				
				-- teste add rA, rB - com overflow
				-- [mov r3,imed | imd(128) | bubble | bubble | mov r1,imed | imd(128) | bubble | bubble | add r3, r1]
				-- memory(0 TO 71)   <= "100010001000000000000000000000001000000010000000000000000000000000011000";
				
				-- teste add rA, imed
				-- [mov r1,imed | imd(12) | bubble | bubble | add r1,imed | imd(4) | bubble | bubble | bubble]
				-- memory(0 TO 71)   <= "100000000000110000000000000000001011000000000100000000000000000000000000";
				
				----------------------------------------SUB
				-- teste sub rA, imed
				-- [mov r2,imed | imd(12) | bubble | bubble | sub r2,imed | imd(4) | bubble | bubble | bubble]
				-- memory(0 TO 71)   <= "100001000000110000000000000000001100010000000100000000000000000000000000";
				
				-- teste sub rA, rB
				-- [mov r2,imed | imd(12) | bubble | bubble | mov r4,imed | imd(5) | bubble | bubble | sub r2, r4]
				-- memory(0 TO 71)   <= "100001000000110000000000000000001000110000000101000000000000000000100111";
				
				----------------------------------------AND
				-- teste and rA, rB
				-- [mov r2,imed | imd(12) | bubble | bubble | mov r4,imed | imd(5) | bubble | bubble | and r2, r4]
				-- memory(0 TO 71)   <= "100001000000110000000000000000001000110000000101000000000000000000110111";
				
				-- teste and rA, rB
				-- [mov r2,imed | imd(12) | bubble | bubble | and r2,imed | imd(12) | bubble | bubble | bubble]
				-- memory(0 TO 71)   <= "100001000000110000000000000000001101010000001100000000000000000000000000";
				
				----------------------------------------OR
				-- teste or rA, rB
				-- [mov r2,imed | imd(12) | bubble | bubble | and r2,imed | imd(12) | bubble | bubble | or r2, r4]
				-- memory(0 TO 71)   <= "100001000000110000000000000000001000110000000101000000000000000001000111";
				
				----------------------------------------JMP, JAL, JR
				-- teste jal -> random -> jump -> jump -> jr
				-- [jal(guarda end 16) | end(32) | random | jr(16) | random | jump | end(56) | jump | end(16)]
				-- memory(0 TO 71)   <= "100001000000110000000000000000001000110000000101000000000000000001000111";
				
				Instruction(7) <= memory(to_integer(unsigned(Address)));
				Instruction(6) <= memory(to_integer(unsigned(Address)) + 1);
				Instruction(5) <= memory(to_integer(unsigned(Address)) + 2);
				Instruction(4) <= memory(to_integer(unsigned(Address)) + 3);
				Instruction(3) <= memory(to_integer(unsigned(Address)) + 4);
				Instruction(2) <= memory(to_integer(unsigned(Address)) + 5);
				Instruction(1) <= memory(to_integer(unsigned(Address)) + 6);
				Instruction(0) <= memory(to_integer(unsigned(Address)) + 7);
				Immediate(7) <= memory(to_integer(unsigned(Address)) + 8);
				Immediate(6) <= memory(to_integer(unsigned(Address)) + 9);
				Immediate(5) <= memory(to_integer(unsigned(Address)) + 10);
				Immediate(4) <= memory(to_integer(unsigned(Address)) + 11);
				Immediate(3) <= memory(to_integer(unsigned(Address)) + 12);
				Immediate(2) <= memory(to_integer(unsigned(Address)) + 13);
				Immediate(1) <= memory(to_integer(unsigned(Address)) + 14);
				Immediate(0) <= memory(to_integer(unsigned(Address)) + 15);
END Behavior;